DocumentCode :
2275839
Title :
VLSI appropriate design of a trace-back Viterbi decoder
Author :
Golda, Peter J. ; Benzakein, A. ; Groenendaal, J. G vd ; Braun, R.M.
Author_Institution :
Dept. of Electr. Eng., Cape Town Univ., Rondebosch, South Africa
fYear :
1994
fDate :
34611
Firstpage :
76
Lastpage :
80
Abstract :
This paper concerns the research into the implementation of an efficient Viterbi algorithm for the decoding of convolutional codes. The original algorithm, as presented by Truong (see IEEE Trans. Commun. Technol., vol.40, no.3, p.616-624, 1992), is described, with many new points being noted. A detailed discussion of the improvements made to the algorithm is included, along with a full example of the operation of the algorithm
Keywords :
VLSI; Viterbi decoding; convolutional codes; VLSI design; Viterbi algorithm; convolutional codes; decoding; trace-back Viterbi decoder; Algorithm design and analysis; Cities and towns; Convolutional codes; Delay; Maximum likelihood decoding; Registers; Thumb; Transforms; Very large scale integration; Viterbi algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Signal Processing, 1994. COMSIG-94., Proceedings of the 1994 IEEE South African Symposium on
Conference_Location :
Stellenbosch
Print_ISBN :
0-7803-1998-2
Type :
conf
DOI :
10.1109/COMSIG.1994.512439
Filename :
512439
Link To Document :
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