On-chip phase change heat sinks designed for computational sprinting

Computational sprinting has been proposed to improve responsiveness for the intermittent computational demands of many current and emerging mobile applications by briefly activating reserve cores and/or boosting frequency and voltage to power levels that far exceed the system´s sustained cooling capability. In this work, we focus on the thermal consequences of computational sprinting, studying the use of silicon thermal test chips as processor proxies in a real smartphone package with realistic thermal constraints. We study conditions in which multiple cycles of sprint and cooldown are repeated every few seconds to verify the feasibility of sprinting. Integrated on-chip phase change heat sinks filled with low melting temperature metallic alloys are demonstrated to provide a thermal buffer during intermittent computations by keeping the chip at lower peak and average temperatures.