• DocumentCode
    2276904
  • Title

    Practical code coverage for Verilog

  • Author

    Wang, Tsu-Hua ; Tan, Chong Guan

  • Author_Institution
    Sun Microsystems Inc., Mountain View, CA, USA
  • fYear
    1995
  • fDate
    27-29 Mar 1995
  • Firstpage
    99
  • Lastpage
    104
  • Abstract
    The ability to detect sections of code that have not been executed in a program or design has always been desired by hardware designers, since unexecuted code is clearly untested code. Unfortunately, there have been virtually no practical mechanisms for doing so. Given the combinatorial number of input possibilities for even a moderate design, exhaustive coverage obviously exceeds the capabilities of simulators. However, this does not mean that there cannot be useful heuristics, short of full coverage, that provide valuable feedback to hardware designers. This paper discusses a number of such practical approaches explored in a joint research project between Sun Microsystems and Chronologic Simulation. In addition to discussing the various intermediate approaches explored, the paper also discusses one approach that appears both practical and useful and its utility in uncovering untested sections in several Sun designs
  • Keywords
    hardware description languages; program testing; virtual machines; Chronologic Simulation; Sun Microsystems; Verilog; code coverage; heuristics; input possibilities; simulators; unexecuted code sections detection; untested code; Computer bugs; Design engineering; Design methodology; Feedback; Hardware design languages; Programming profession; Software tools; Sun; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Verilog HDL Conference, 1995. Proceedings., 1995 IEEE International
  • Conference_Location
    Santa Cruz, CA
  • Print_ISBN
    0-8186-7082-7
  • Type

    conf

  • DOI
    10.1109/IVC.1995.512503
  • Filename
    512503