DocumentCode
22772
Title
An Energy-Efficient Offset-Cancelling Sense Amplifier
Author
Shah, J.S. ; Nairn, D. ; Sachdev, Manoj
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
Volume
60
Issue
8
fYear
2013
fDate
Aug. 2013
Firstpage
477
Lastpage
481
Abstract
As SRAM cells are scaled aggressively to increase the overall packing density, the smaller transistors exhibit higher degrees of process variation and mismatch, leading to larger offset voltages. For SRAM sense amplifiers (SAs), higher offset voltages lead to an increased likelihood of an incorrect decision. In this brief, an SA capable of cancelling the input offset voltage is presented. The simulated and measured results in 180-nm technology show that the SA is capable of detecting a 4-mV differential input signal under dc and transient conditions. The proposed SA when compared with other offset cancellation schemes exhibits comparable offset cancellation performance with a smaller delay and significantly lower energy consumption.
Keywords
SRAM chips; amplifiers; SRAM cells; SRAM sense amplifiers; energy consumption; energy efficient offset cancelling sense amplifier; offset cancellation performance; offset voltages; overall packing density; process variation; transistors; Current sense amplifier (SA); offset cancellation; static random access memory (SRAM); threshold voltage mismatch;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2013.2268312
Filename
6553086
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