New method of WLCSP for process optimization and reliability prediction

A new and fast WLCSP (Wafer Level Chip Scale Package) evaluation method has been provided to cover different kinds of factors, such as die size, solder ball pitch, PCB (Printed Circuit Board) designs, etc. In this work, 2 TVs (Test Vehicles) with larger die size are designed to reveal the behaviors of various factors, and 1 TV with finer ball pitch is used to both confirm the behaviors of the 2 large TVs and assess the feasibility of employing this design in the production line. The designs of PCB cover different schemes, such as SMD/NSMD (Non-Solder Mask Define) and VIP/NVIP (Non-Via In Pad). The BLR (Board Level Reliability) includes Drop and TC (Temperature Cycling). Besides, the results of 2 different temperature profiles for TC test are also discussed in the study. Based on this design, the evaluation time and effort can be largely reduced before implementing new or revised conditions in the production line.