DocumentCode :
2278279
Title :
Real Time Stereo Vision with a modified Census transform in FPGA
Author :
Xicotencatl-Perez, J.M. ; Lezama-Leon, A. ; Liceaga-Ortiz-De-La-Pena, J.M. ; Hernandez-Terrazas, R.O.
fYear :
2012
fDate :
19-23 Nov. 2012
Firstpage :
89
Lastpage :
94
Abstract :
In this work, it is presented functional hardware architecture for stereo processing with a modified census transform. Architecture is segmented in image rectification to avoid lens distortion, stereo processing with a modified Census transform and finally post processing using a propagation algorithm to correct false disparity values. Proposed architecture uses minimal hardware and memory requirement in a way that Spartan Low Cost FPGA is used for implementation.
Keywords :
field programmable gate arrays; image segmentation; stereo image processing; FPGA; census transform; false disparity value; functional hardware architecture; image rectification; image segmentation; propagation algorithm; real time stereo vision; Census TRansform; FPGA; Stereo Vision;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Robotics and Automotive Mechanics Conference (CERMA), 2012 IEEE Ninth
Conference_Location :
Cuernavaca
Print_ISBN :
978-1-4673-5096-9
Type :
conf
DOI :
10.1109/CERMA.2012.23
Filename :
6524561
Link To Document :
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