Characterization of moisture and thermally induced die stresses in flip chip on laminate assemblies

Stress sensing test chips are a powerful tool for measuring in-situ stresses in electronic packages. In this study, we have applied (111) silicon test chips to perform a variety of measurements of moisture and thermally induced die stresses in flip chip on laminate assemblies. The developed chips incorporated optimized eight-element sensor rosettes that were capable of measuring the complete state of stress at the die surface (including the interfacial shear stresses). For the measurements completed in this work, the test chips were 10 × 10 mm in size, and contained 200 μm pitch perimeter solder bumps. Each chip contained 19 eight-element sensor rosettes, two diodes for temperature measurement, and a 10-bit fuse style chip ID.