DocumentCode :
2278422
Title :
Optimization of a back bias generator for NMOS VLSI
Author :
Liran, T.
Author_Institution :
Nat. Semicond. Ltd., Migdal Haemek, Israel
fYear :
1988
fDate :
7-9 Jun 1988
Firstpage :
1601
Abstract :
An optimized back bias generator was designed and implemented in the NS32332 32-bit microprocessor. A novel analysis method based on energy transfer in the charge pump circuit was used for better understanding of the circuit. The complete considerations, implementation, and the improved performance results are presented and discussed. The most important design consideration was to implement a very strong pump and to eliminate mechanisms that might cause instabilities
Keywords :
MOS integrated circuits; VLSI; optimisation; NMOS VLSI; back bias generator; charge pump circuit; design; energy transfer; microprocessor; performance; Breakdown voltage; Capacitance; Charge pumps; Circuit noise; Design optimization; Energy exchange; MOS devices; Microprocessors; Substrates; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo
Type :
conf
DOI :
10.1109/ISCAS.1988.15239
Filename :
15239
Link To Document :
بازگشت