DocumentCode
2278705
Title
A new non-pair diffusion based dopant pile-up model for process designers and its prediction accuracy
Author
Hayashi, Hirokazu ; Miura, Noriyuki ; Komatsubara, Hirotaka ; Mochizuki, Marie ; Fukuda, Koichi
Author_Institution
Syst. LSI Res. Div., Oki Electr. Ind. Co. Ltd., Tokyo, Japan
fYear
2002
fDate
2002
Firstpage
207
Lastpage
210
Abstract
This paper describes an effective model which reproduces the dopant pile-up in the Si/SiO2 interface using a conventional process simulator that solves one equation for each impurity. The proposed model is based on the physics where the key factor of RSCE is the dopant pile-up in the Si/SiO2 interface. The capability of the model is investigated though the comparison to measurements in actual fabricated nMOSFETs for different process technologies.
Keywords
MOSFET; doping profiles; elemental semiconductors; semiconductor device models; semiconductor process modelling; silicon; silicon compounds; surface diffusion; Si-SiO2; Si/SiO2 interface; dopant pile-up model; nMOSFETs; non-pair diffusion; prediction accuracy; process designers; Accuracy; Design optimization; Equations; Impurities; Large scale integration; MOSFETs; Physics; Predictive models; Process design; Semiconductor process modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 2002. SISPAD 2002. International Conference on
Print_ISBN
4-89114-027-5
Type
conf
DOI
10.1109/SISPAD.2002.1034553
Filename
1034553
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