DocumentCode :
2278981
Title :
The concept of resistance interval: a new parametric model for realistic resistive bridging fault
Author :
Renovell, M. ; Huc, P. ; Bertrand, Y.
Author_Institution :
Lab. d´´Informatique, Robotique et Microelectronique, Univ. des Sci. et Tech. du Languedoc, Montpellier, France
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
184
Lastpage :
189
Abstract :
From circuit measurement, it has been demonstrated that actual bridging faults have an intrinsic resistance mainly in the range from 0 Ω to 500 Ω. This paper first analyses the consequences of this resistance on the electrical and logic behavior of bridging faults. Second, it is demonstrated that the classical models such as the voting model which consider the resistance as negligible, do not accurately and realistically represent the behavior of the fault. Third, a new parametric bridging fault model is proposed allowing to realistically represent the faulty behavior according to the intrinsic resistance which is not known a priori. Finally, a parametric bridging fault simulation algorithm is described together with some redefinition of the classical concepts of fault detection and fault coverage
Keywords :
VLSI; automatic testing; electric resistance; fault diagnosis; integrated circuit testing; logic gates; logic testing; 0 to 500 ohm; VLSI; bridging faults; fault coverage; fault detection; faulty behavior; intrinsic resistance; logic behavior; logic gates; parametric model; resistance interval; resistive bridging fault; Circuit faults; Electric resistance; Electrical resistance measurement; Fault detection; Logic devices; Logic gates; Parametric statistics; Robots; Threshold voltage; Voting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1995. Proceedings., 13th IEEE
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7000-2
Type :
conf
DOI :
10.1109/VTEST.1995.512635
Filename :
512635
Link To Document :
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