Title :
A novel chip joint method for high temperature operated SiC power modules
Author :
Lang, Fengqun ; Hayashi, Yusuke ; Nakagawa, Hiroshi ; Aoyagi, Masahiro ; Ohashi, Hiromichi
Author_Institution :
National Inst. of Adv. Ind. Sci. & Technol., AIST, Ibaraki
Abstract :
A novel chip joint method for bonding SiC power device chips with Al metallized electrodes has been developed for three-dimensional (3D) packaging. This method is a combination of Au stud bumping on an Al metallized electrode of a power chip and subsequent reflow soldering with Au-20Sn solder. The die shear strength of a Au-stud-bumped SiC power device chip bonded on a AlN/Cu/Ni(Au) substrate with Au-20Sn solder reached up to 83.67MPa, which was about 5 times higher than that of a Au-stud-bumped chip bonded with Pb90-Sn solder. After shear test, the assembly fractured at the solder/substrate interface rather than at the solder/chip interface. This indicates that an Al metallized electrode of a power chip can be solidly assembled to a AlN/Cu/Ni(Au) substrate by Au stud bumps and Au-20Sn eutectic solder. After being aged at 200degC for 300 hrs, the resistance change of the bonded chips with Au-stud bumps and Au-20Sn solder was less than 6%. This proposed chip joint method presents a novel approach for 3D packaging high temperature operated SiC power modules.
Keywords :
aluminium; high-temperature electronics; lead; power semiconductor devices; reflow soldering; semiconductor device packaging; silicon compounds; tin; wide band gap semiconductors; 200 C; 300 hrs; 3D packaging; Al metallized electrodes; Pb-Sn; SiC; chip joint method; high temperature operation; power device chips; shear test; solder; Assembly; Bonding; Electrodes; Gold; Metallization; Multichip modules; Packaging; Reflow soldering; Silicon carbide; Temperature;
Conference_Titel :
Electronics Packaging Technology Conference, 2006. EPTC '06. 8th
Conference_Location :
Singapore
Print_ISBN :
1-4244-0664-1
Electronic_ISBN :
1-4244-0665-X
DOI :
10.1109/EPTC.2006.342781
