DocumentCode :
2279364
Title :
Compact test sets for industrial circuits
Author :
Konijnenburg, M.H. ; Van der Linden, J. Th ; van de Goor, A.J.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
358
Lastpage :
366
Abstract :
Industrial circuits contain, in addition to the binary logic elements [n] and, [n] or and [n] xor gates, other logic elements such as three-state elements, busses and bidirectionals. Previous published work on automatic test pattern generation (ATPG) can not handle all of the above mentioned circuit elements, generates too large test sets, or generates test patterns which can cause circuit damage. A new fast ATPG system for industrial circuits is introduced capable of coping with all of the above mentioned circuit elements, will not cause circuit damage and generates compact test sets using new heuristics for compaction oriented decision making. Experimental results show that the compact test sets are much smaller than in [vdL94b] (on average 60%). The extra ATPG time required for generating these compact test sets is a relatively small penalty compared to the decrease in test set size
Keywords :
automatic testing; combinational circuits; integrated circuit testing; logic testing; multivalued logic circuits; automatic test pattern generation; bidirectionals; binary logic elements; compact test sets; compaction oriented decision making; heuristics; industrial circuits; or gates; test patterns; test set size; three-state elements; xor gates; Automatic test pattern generation; Automatic testing; Benchmark testing; Circuit faults; Circuit testing; Compaction; Decision making; Logic circuits; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1995. Proceedings., 13th IEEE
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7000-2
Type :
conf
DOI :
10.1109/VTEST.1995.512661
Filename :
512661
Link To Document :
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