DocumentCode :
2279416
Title :
On the application of local circuit transformations with special emphasis on path delay fault testability
Author :
Hengster, Harry ; Drechsler, Rolf ; Becker, Bernd
Author_Institution :
Dept. of Comput. Sci., Frankfurt Univ., Germany
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
387
Lastpage :
392
Abstract :
Several types of local transformations and their effect on path delay fault testability have been examined in the literature. In this paper we present SALT (System for Application of Local Transformations), which is a general tool for the application of a user-defined set of local transformations. The concepts of “related transformations” and of “pseudo-isomorphism” are introduced, which are used in SALT to allow the application of local transformations more frequently. We use SALT to apply testability preserving and testability improving transformations. The effect of these transformations on the size, depth and testability of the transformed circuits is compared to the results obtained by other approaches on benchmark circuits
Keywords :
automatic testing; delays; integrated circuit testing; logic testing; SALT; local circuit transformations; path delay fault testability; Benchmark testing; Circuit faults; Circuit synthesis; Circuit testing; Clocks; Combinational circuits; Integrated circuit synthesis; Power system modeling; Propagation delay; Terminology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1995. Proceedings., 13th IEEE
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7000-2
Type :
conf
DOI :
10.1109/VTEST.1995.512665
Filename :
512665
Link To Document :
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