Scalability of the Cedar system

Cedar is a hierarchical shared-memory multiprocessor consisting of four clusters of vector processors connected to a 32-bank word-interleaved shared memory via two unidirectional multistage shuffle-exchange networks. Cedar scalability is studied via simulation and measurement. The simulation methodology is verified by comparing simulated performance with that of the real machine. The performance scalability of the interconnection networks and memory modules which compose Cedar´s shared memory system is then examined in detail. The system is shown to be basically scalable in performance, but not perfectly so. A “brute force” approach to increasing scalability, doubling the clock speed of the memory subsystem, is shown to be only moderately effective at improving scalability. Finally, by limiting traffic in the network, the scalability of the system is increased significantly at very little cost