Title :
An accurate crosstalk noise estimation method for two simultaneously switched on-chip VLSI distributed RLCG global interconnects
Author :
Kar, R. ; Maheshwari, V. ; Choudhary, Alok ; Singh, A. ; Mal, A.K. ; Bhattacharjee, A.K.
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Durgapur, India
Abstract :
On-chip inductive effects are becoming predominant in deep submicron (DSM) interconnects due to increasing clock speed, circuit complexity and decreasing interconnect lengths. Inductance causes noise in the signal waveforms, which could adversely affect the performance of the circuit and signal integrity. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. This paper proposes a difference model approach to derive crosstalk in the transform domain. A closed form solution for crosstalk is obtained by incorporating initial conditions using difference modal approach for distributed RLCG interconnects. We have derived the crosstalk metric for two parallel lines when both are switching simultaneously. A raw evaluation of the crosstalk could be at the origin of a malfunction of the circuit. Cross talk can be analyzed by computing the signal linkage between aggressor or attacker nets and victim nets. The attacker net carries a signal that couples to the victim net through the mutual inductance. In order to determine the effects that this cross talk will have on circuit operation, the resulting voltage expressions at the victim and aggressor must be calculated. This paper proposes a difference model approach for the effective voltages at the victim and aggressor using superposition theorem. The accuracy of our approach is justified by the results obtained from SPICE simulation.
Keywords :
SPICE; VLSI; circuit complexity; circuit simulation; inductance; integrated circuit interconnections; integrated circuit noise; SPICE simulation; accurate crosstalk noise estimation method; aggressor nets; attacker nets; circuit complexity; crosstalk metric; deep submicron interconnects; difference modal approach; distributed RLCG interconnects; mutual inductance; on-chip inductive effects; signal linkage; signal waveforms; simultaneously switched on-chip VLSI; superposition theorem; victim nets; Capacitance; Couplings; Crosstalk; Equations; Inductance; Integrated circuit interconnections; Power transmission lines; Crosstalk; Difference Model; Distributed RLCG line; Inductive coupling; On-Chip Interconnect; Superposition theorem; VLSI;
Conference_Titel :
Signal and Image Processing (ICSIP), 2010 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4244-8595-6
DOI :
10.1109/ICSIP.2010.5697499