DocumentCode :
2280378
Title :
FPGA implementation Of FFT processor with OFDM transceiver
Author :
Merlyn, M.
Author_Institution :
ECE, Jayaram Coll. of Engg & Tech, Trichy, India
fYear :
2010
fDate :
15-17 Dec. 2010
Firstpage :
483
Lastpage :
489
Abstract :
The technique of orthogonal frequency division multiplexing (OFDM) is famous for its robustness against frequency-selective fading channel. This technique has been widely used in many wired and wireless communication systems. In general, the fast Fourier transform (FFT) and inverse FFT (IFFT) operations are used as the modulation/demodulation in the OFDM systems, and the sizes of FFT/IFFT operations are varied in different applications of OFDM systems. This paper aim is to design and implement a variable-length prototype FFT/IFFT processor to cover different specifications of OFDM applications. Implemented in FPGA using Verilog HDL.
Keywords :
OFDM modulation; fading channels; fast Fourier transforms; field programmable gate arrays; hardware description languages; inverse transforms; radio transceivers; FFT processor; FPGA; OFDM transceiver; fast Fourier transform; field programmable gate array; frequency selective fading channel; inverse FFT; orthogonal frequency division multiplexing; verilog HDL; wired communication system; wireless communication system; FFT; FPGA; IFFT; OFDM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal and Image Processing (ICSIP), 2010 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4244-8595-6
Type :
conf
DOI :
10.1109/ICSIP.2010.5697523
Filename :
5697523
Link To Document :
بازگشت