DocumentCode :
228052
Title :
Understanding the impact of temperature variations on measurement of stress dependent parameters of bipolar junction transistors
Author :
Hussain, Shiraz ; Jaeger, Richard C. ; Suhling, Jeffrey C. ; Wilamowski, Bogdan M. ; Hamilton, Michael C. ; Gnanachchelvi, Parameshwaran
Author_Institution :
Dept. of Mech. Eng., Auburn Univ., Auburn, AL, USA
fYear :
2014
fDate :
27-30 May 2014
Firstpage :
1244
Lastpage :
1250
Abstract :
The macroscopic stress dependence of bipolar junction transistors (BJTs) can be modeled by three transport model parameters as a function of stress: saturation current IS, forward current gain βF, and Early voltage VA. Recent research has shown that Early voltage VA is independent of stress, so it is not discussed in detail in this paper. Unfortunately, accurate extraction of model parameters IS and β from measurement of collector current IC and base current IB is easily compromised by the large temperature sensitivity of the BJT due to the exponential dependencies on temperature. For example, if one measures IC and IB with constant base-emitter voltage, one must contend with temperature sensitivities as large as 45 × (ΔT/T) - i. e. a 1° K change at room temperature yields a 15% change in IS, overwhelming smaller variations due to stress. Examples of these thermal errors are presented. We have developed a new non-temperature compensated approach based upon fixed emitter current biasing that still provides two degrees of freedom necessary to independently measure current gain and saturation current, but with manageable temperature sensitivity. Examples of the new measurement technique to characterize variations of β and IS are presented for vertical npn transistors under tensile and compressive stresses ranging between 0 and 150 MPa. Current gain is shown to be a quasi temperature-compensated quantity relative to either the individual collector or base currents, with the residual temperature coefficient limited by the bandgap difference between the base and emitter regions of the transistor. Our experimental results agree well with macroscopic device models based upon piezoresistivity [1] and deformation potential based formulations [2]. The stress dependent transistor models are combined with SPICE - ircuit simulation to demonstrate the impact of stress on basic analog IC building blocks. Measurements agree well with both theoretical and circuit simulation calculations for PTAT voltage generators, bandgap references and operational amplifier offset voltages.
Keywords :
amplification; bipolar transistors; semiconductor device models; stress effects; SPICE circuit simulation; analog IC building block; bipolar junction transistors; collector current; compressive stress; early voltage; fixed emitter current biasing; forward current gain; macroscopic stress dependence; pressure 0 MPa to 150 MPa; saturation current; stress dependent parameter measurement; stress dependent transistor model; stress function; temperature sensitivity; temperature variation; tensile stress; transport model parameter; Current measurement; Silicon; Stress; Strips; Temperature measurement; Transistors; Voltage measurement; BJT; Bipolar Transistor; Current Gain; Deformation Potential; Four Point Bending; Piezoresistance; Strain; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 2014 IEEE Intersociety Conference on
Conference_Location :
Orlando, FL
ISSN :
1087-9870
Type :
conf
DOI :
10.1109/ITHERM.2014.6892423
Filename :
6892423
Link To Document :
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