• DocumentCode
    2281369
  • Title

    Multi-Processor Parallel System Based on High-Speed Serial Transceiver

  • Author

    Huang, Xiao-yun ; Su, Hai-bing ; Wu, Qin-zhang ; Wu, Wei

  • Author_Institution
    Dept. of Comput. Sci., SiChuan Univ., Chengdu, China
  • Volume
    1
  • fYear
    2010
  • fDate
    6-7 March 2010
  • Firstpage
    178
  • Lastpage
    181
  • Abstract
    The data exchange capacity among each processing units was a key factor in performance of multiprocessor parallel system. Parallel interconnection based on master-slave architecture constrained by several factors could not be further increased bandwidth. However, high-speed serial interconnect based on point-to-point architecture could achieve greater bandwidth. This paper presented a new multi-processor parallel system based on high-speed serial interconnects. There were four processing channels in this system. Each channel consisted of a piece of FPGA and a piece of DSP. All of these processing units were connected by serial RapidIO bus. Several data exchange methods were designed in this project to solve the bottleneck of data exchange in the multi-processor parallel system. Therefore, the system parallelism and performance was greatly improved. The system has some characteristic: versatility, high parallelism, structure flexible, modularization.
  • Keywords
    digital signal processing chips; electronic data interchange; field programmable gate arrays; multiprocessing systems; parallel processing; DSP; FPGA; data exchange capacity; high-speed serial interconnect; high-speed serial transceiver; master-slave architecture; multiprocessor parallel system; parallel interconnection; point-to-point architecture; processing unit; serial RapidIO bus; system parallelism; Access protocols; Bandwidth; Clocks; Computer science; Digital signal processing; Field programmable gate arrays; Optical distortion; Optical receivers; Parallel processing; Transceivers; data exchange; high-speed serial interconnect; multi-processor; parallel processing; system parallelism;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Education Technology and Computer Science (ETCS), 2010 Second International Workshop on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-6388-6
  • Electronic_ISBN
    978-1-4244-6389-3
  • Type

    conf

  • DOI
    10.1109/ETCS.2010.576
  • Filename
    5458799