• DocumentCode
    2281992
  • Title

    Efficient implementation selection via time budgeting: complexity analysis and leakage optimization case study

  • Author

    Ghiasi, Soheil

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
  • fYear
    2005
  • fDate
    2-5 Oct. 2005
  • Firstpage
    127
  • Lastpage
    129
  • Abstract
    We present time budgeting as an efficient technique for implementation selection. We discuss discreteness in library and present an optimal algorithm for a special case of the problem. The algorithm is extended to construct a heuristic for the general case, and is experimented on the gate-level threshold voltage assignment problem in dual Vt technology. Experimental results show that our approach reduces the leakage current by close to an order of magnitude, with no or negligible delay penalty. Compared to existing algorithms, our technique outperforms a recent LP-based competitor by 33%.
  • Keywords
    integrated circuit design; leakage currents; logic design; complexity analysis; dual threshold voltage technology; implementation selection; leakage optimization; threshold voltage assignment; time budgeting; Clocks; Computer aided software engineering; Costs; Delay; Financial management; Flow graphs; Leakage current; Libraries; Threshold voltage; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
  • Print_ISBN
    0-7695-2451-6
  • Type

    conf

  • DOI
    10.1109/ICCD.2005.44
  • Filename
    1524141