• DocumentCode
    2282102
  • Title

    Quick scan chain diagnosis using signal profiling

  • Author

    Yang, Jheng-Syun ; Huang, Yang Shi-Yu

  • Author_Institution
    Dept. of Electr. Eng., National Tsing-Hua Univ., Hsinchu, Taiwan
  • fYear
    2005
  • fDate
    2-5 Oct. 2005
  • Firstpage
    157
  • Lastpage
    160
  • Abstract
    In this paper we address the scan chain diagnosis problem. We propose a new diagnosis flow based on the concept of signal profiling to accurately pinpoint the location of a faulty flip-flop in a scan chain. As compared to the conventional cause-effect or effect-cause analysis, this approach is much more computationally efficient because it does not have to simulate the behaviors of a large number of fault candidates. Also, it is general and applicable to all kinds of faults because it does not assume any specific fault model. Experimental results indicate that this approach can instantly catch a fault within a scan chain quite accurately in most cases.
  • Keywords
    boundary scan testing; fault simulation; flip-flops; integrated circuit testing; logic testing; cause-effect analysis; fault location; faulty flip-flop; scan chain diagnosis; signal profiling; Analytical models; Cause effect analysis; Circuit faults; Computational modeling; Fault diagnosis; Flip-flops; Logic; Manufacturing processes; Testing; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
  • Print_ISBN
    0-7695-2451-6
  • Type

    conf

  • DOI
    10.1109/ICCD.2005.89
  • Filename
    1524147