DocumentCode
2283218
Title
State set management for SAT-based unbounded model checking
Author
Chandrasekar, Kameshwar ; Hsiao, Michael S.
Author_Institution
Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear
2005
fDate
2-5 Oct. 2005
Firstpage
585
Lastpage
590
Abstract
In recent years, Boolean satisfiability (SAT) has been shown to hold potential for unbounded model checking (UMC). The success of SAT-based UMC largely relies on (i) the SAT solver efficiency, (it) solution cube enlargement, and (Hi) state-set management. In this paper, we propose a simple, yet efficient, clause conversion technique to account for the state set obtained by SAT-based UMC. Our state set is stored in a zero-suppressed binary decision diagram (ZBDD), and the shared structures in the ZBDD are exploited to aggressively avoid repeated manipulation of common subsets in the state-set. The resulting number of clauses, generated for the state set, now depends on the number of nodes in the ZBDD, rather than the number of solutions found. We integrated the proposed techniques in an unbounded model checking framework that uses a pure SAT solver. The experimental results show that we can attain orders of magnitude improvement in both performance and capacity as compared to the existing techniques.
Keywords
Boolean algebra; binary decision diagrams; electronic engineering computing; formal verification; integrated circuit testing; logic testing; Boolean satisfiability; clause conversion technique; state set; unbounded model checking; zero-suppressed binary decision diagram; Boolean functions; Circuits; Computer bugs; Data structures; Explosions; Hardware; Robustness; Scalability; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
Print_ISBN
0-7695-2451-6
Type
conf
DOI
10.1109/ICCD.2005.99
Filename
1524210
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