Title :
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
Author :
Eyerman, S. ; Ecckhout, L.
Author_Institution :
Dept. of ELIS, Ghent Univ.
Abstract :
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-latency load aware SMT fetch policies limit the amount of resources allocated by a staffed thread by identifying long-latency loads and preventing the given thread from fetching more instructions - and in some implementations, instructions beyond the long-latency load may even be flushed which frees allocated resources. This paper proposes an SMT fetch policy that hikes into account the available memory-level parallelism (MLP) in a thread. The key idea proposed in this paper is that in case of an isolated long-latency had. i.e. there is no MLP the thread should be prevented from allocating additional resources. However, in case multiple independent long-latency loads overlap, i.e., there is MLP the thread should allocate as many resources as needed in order to fully expose the available MLP. The proposed MLP-aware fetch policy achieves better performance for MLP-intensive threads on an SMT processor and achieves a better overall balance between performance and fairness than previously proposed fetch policies
Keywords :
multi-threading; multiprocessing systems; parallel processing; storage management; fetch policy; memory-level parallelism; simultaneous multithreading processor; Artificial intelligence; Delay; Etching; Gas detectors; Ink; Resource management; Surface-mount technology; Tellurium; Tin; Yarn;
Conference_Titel :
High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0804-0
DOI :
10.1109/HPCA.2007.346201