Title :
High performance submicron SOI/CMOS with an elevated source/drain structure
Author :
Hwang, J.M. ; Yee, E. ; Houston, T. ; Pollack, G.P.
Author_Institution :
Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX, USA
Abstract :
To overcome the source/drain resistance problem associated with complete silicidation of thin SOI films, we used an elevated source/drain structure in which the channel region was thinned by local oxidation and wet etch while the source/drain region remained thick. This structure achieved source/drain resistances as small as 300 ohm-μm for NMOS, which made possible high drive currents in deep submicron thin-film SOI/MOSFETs
Keywords :
CMOS integrated circuits; etching; insulated gate field effect transistors; integrated circuit technology; oxidation; semiconductor-insulator boundaries; silicon; thin film transistors; IC fabrication; Si; channel region thinning; deep submicron MOSFETs; elevated source/drain structure; high drive currents; local oxidation; silicidation; submicron SOI CMOS; thin SOI films; thin-film SOI MOSFET; wet etch; Annealing; Delay; Doping; Electron devices; Implants; MOS devices; MOSFETs; Ring oscillators; Tin; Voltage-controlled oscillators;
Conference_Titel :
SOI Conference, 1993. Proceedings., 1993 IEEE International
Conference_Location :
Palm Springs, CA
Print_ISBN :
0-7803-1346-1
DOI :
10.1109/SOI.1993.344563
