Short-channel effects in deep-submicrometer SOI MOSFETS

Author

Su, Lisa T. ; Jacobs, Jarvis B. ; Chung, James E. ; Antoniadis, Dimitri A.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

fYear

1993

fDate

5-7 Oct 1993

Firstpage

112

Lastpage

113

Abstract

Thin-film, fully-depleted silicon-on-insulator (SOI) MOSFETs are currently of great interest due to potentially improved isolation, reduced subthreshold slope, and reduced parasitic capacitances as compared to bulk silicon technology. In addition, for scaling devices into the deep-submicrometer region, SOI offers unique options for the reduction of short-channel effects. Previous work has shown that scaling silicon film thickness and buried oxide thickness are important in the reduction of SOI short-channel effects. However, to fully exploit these options in SOI, a careful examination of the design tradeoffs is necessary. In this paper, short-channel effects in SOI are examined in comparison to conventional bulk devices for scaling into the deep-submicrometer region

Keywords

insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; silicon; Si; buried oxide thickness; deep-submicrometer SOI MOSFETS; deep-submicron region; design tradeoffs; device scaling; short-channel effects; thin-film fully-depleted devices; Doping; Instruction sets; Isolation technology; MOSFETs; Manufacturing; Semiconductor films; Silicon on insulator technology; Space technology; Substrates; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1993. Proceedings., 1993 IEEE International

Conference_Location

Palm Springs, CA

Print_ISBN

0-7803-1346-1

Type

conf

DOI

10.1109/SOI.1993.344571

Filename

344571