An analytical back gate bias dependent threshold voltage model for SiGe-channel ultra-thin SOI PMOS devices

Author

Kuo, J.B. ; Tang, M.C. ; Sim, J.H.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

1993

fDate

5-7 Oct 1993

Firstpage

90

Lastpage

91

Abstract

This paper reports an analytical threshold voltage model for SiGe-channel ultra-thin SOI PMOS devices. As confirmed by the PISCES simulation results, the analytical model provides a good prediction on the threshold voltage. According to the analytical formula, depending on the back gate bias, the SiGe-channel SOI PMOS device may have a conduction channel at the top or the bottom of the SiGe channel or at the top of the field oxide

Keywords

Ge-Si alloys; insulated gate field effect transistors; semiconductor device models; semiconductor materials; semiconductor-insulator boundaries; silicon; simulation; PISCES simulation; Si; SiGe; SiGe-channel PMOS devices; analytical model; back gate bias dependent model; conduction channel; field oxide; threshold voltage model; ultra-thin SOI PMOS devices; Analytical models; Germanium silicon alloys; MOS devices; Performance analysis; Poisson equations; Predictive models; Semiconductor thin films; Silicon germanium; Substrates; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1993. Proceedings., 1993 IEEE International

Conference_Location

Palm Springs, CA

Print_ISBN

0-7803-1346-1

Type

conf

DOI

10.1109/SOI.1993.344577

Filename

344577