DocumentCode :
228390
Title :
A low power CAM with a parity bit and power gated ML sensing
Author :
Vinothini, T. ; Prabakar, V.
Author_Institution :
Dept. of Electron. & Commun. Eng., K.S.Rangasamy Coll. of Technol., Tiruchengode, India
fYear :
2014
fDate :
13-14 Feb. 2014
Firstpage :
1
Lastpage :
6
Abstract :
Content-addressable memory (CAM) is a special type of memory used in very high speed searching applications. CAM is used to search the entire memory in a single clock cycle. It is much faster than RAM in all search applications. Due to its parallel match line comparison, CAM requires more power consumption. Thus high speed and low power ML sense amplifiers are highly sought-after in CAM designs. A parity bit is introduced that leads to reduce area and power overhead. Furthermore, we propose an effective gated-power ML sensing technique to reduce the average power consumption.
Keywords :
content-addressable storage; low-power electronics; average power consumption reduction; content addressable memory; gated power matched line sensing technique; high speed search application; low power CAM; parity bit; power gated ML sensing; Computer aided manufacturing; Computer architecture; Latches; Logic gates; Microprocessors; Writing; CMOS; ML sense amplifier; content addressable memory (CAM); match line;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics and Communication Systems (ICECS), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2321-2
Type :
conf
DOI :
10.1109/ECS.2014.6892590
Filename :
6892590
Link To Document :
بازگشت