DocumentCode :
2284221
Title :
Irreversible bit erasures in binary adders
Author :
Hänninen, Ismo ; Takala, Jarmo
Author_Institution :
Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere, Finland
fYear :
2010
fDate :
17-20 Aug. 2010
Firstpage :
223
Lastpage :
226
Abstract :
The ultra-high density integrated circuits based on nanodevices will suffer from heat dissipation due to irreversible information erasure, limiting the reachable operating frequencies. This paper studies the amount of logical bits lost in standard binary adder structures, which are shown to be sub-optimal when compared with the theoretical limit. The analysis covers the pipelined ripple carry adder, the carry lookahead adder, and the conditional sum adder proposed for quantum-dot cellular automata implementation. The study focuses on majority logic circuits, available also in many other technologies.
Keywords :
adders; logic circuits; quantum dots; carry lookahead adder; conditional sum adder; irreversible bit erasures; logic circuits; logical bits; pipelined ripple carry adder; quantum-dot cellular automata implementation; standard binary adder structures;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2010 10th IEEE Conference on
Conference_Location :
Seoul
ISSN :
1944-9399
Print_ISBN :
978-1-4244-7033-4
Electronic_ISBN :
1944-9399
Type :
conf
DOI :
10.1109/NANO.2010.5697744
Filename :
5697744
Link To Document :
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