DocumentCode :
2284705
Title :
Neuron-MOS multiple-valued memory technology for intelligent data processing
Author :
Au, R. ; Yamashita, T. ; Shibata, T. ; Ohmi, T.
Author_Institution :
Tohoku Univ., Sendai, Japan
fYear :
1994
fDate :
16-18 Feb. 1994
Firstpage :
270
Lastpage :
351
Abstract :
This paper presents RAM technology that quantizes analog input data and stores it as multi-valued data for intelligent data processing. Moreover, data association and classification according to the degree of association can also be performed at the memory-cell level without any software manipulation. The implementation of such intelligent functions by a memory cell has been facilitated by unique circuit configurations of the neuron MOS (vMOS) transistor, a multi-functional device that simulates the action of biological neurons. These concepts are experimentally verified by test devices fabricated by a standard double-polysilicon CMOS process. Although the circuits are explained for a 4-valued system, the designs can be extended to an 8-valued (or greater) system.<>
Keywords :
CMOS integrated circuits; analogue-digital conversion; content-addressable storage; integrated memory circuits; neural chips; random-access storage; RAM; Si; analog data; circuit configurations; data association; data classification; double-polysilicon CMOS process; intelligent data processing; memory-cell; multi-functional device; multi-valued data; neuron MOS transistor; quantization; Biological system modeling; Cells (biology); Circuit simulation; Circuit testing; Data processing; MOSFETs; Neurons; Random access memory; Read-write memory; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-1844-7
Type :
conf
DOI :
10.1109/ISSCC.1994.344645
Filename :
344645
Link To Document :
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