DocumentCode :
2285577
Title :
Modeling fluctuations in the threshold voltage and ON-current and threshold voltage fluctuation due to random telegraph noise
Author :
Ashraf, Nabil ; Vasileska, Dragica ; Klimeck, Gerhard
Author_Institution :
Arizona State Univ., Tempe, AZ, USA
fYear :
2010
fDate :
17-20 Aug. 2010
Firstpage :
782
Lastpage :
785
Abstract :
We investigate the influence of two traps in close proximity within one nanometer located at the semiconductor/oxide interface (positioned in the middle of the gate width and moved from the source end to the drain end of the channel) on the threshold voltage and the ON-current variation. We find that when one of the traps is located at the source end of the channel, the threshold voltage and the magnitude of the drain current are dominated by the potential barrier created by the negatively charged trap. When the trap is positioned at the drain-end of the channel, the barrier effect is smaller and screening (for small drain bias) and the absence of screening (at large drain bias due to the presence of the pinch-off region) determine whether current will be degraded or not.
Keywords :
MOSFET; electron traps; hole traps; random noise; semiconductor device models; semiconductor device noise; ON current; barrier effect; negatively charged trap; random telegraph noise; semiconductor-oxide interface; threshold voltage fluctuations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2010 10th IEEE Conference on
Conference_Location :
Seoul
ISSN :
1944-9399
Print_ISBN :
978-1-4244-7033-4
Electronic_ISBN :
1944-9399
Type :
conf
DOI :
10.1109/NANO.2010.5697821
Filename :
5697821
Link To Document :
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