A CMOS 160 Mb/s phase modulation I/O interface circuit

Author

Nogami, K. ; El Gamal, A.

Author_Institution

Inf. Syst. Lab., Stanford Univ., CA, USA

fYear

1994

fDate

16-18 Feb. 1994

Firstpage

108

Lastpage

109

Abstract

This paper proposes an approach to data transfer that can potentially achieve high rates without requiring the ultra fast clocks of other approaches, or extra wide buses. The idea is to transfer multiple bits over each pin within each clock cycle using modulation techniques common in communication systems. Phase modulation is simple in implementation and demonstrates 160 Mb/s peak transfer rate per pin using a 20 MHz clock. This scheme may prove effective for chip-to-chip or system bus interface both on printed circuit boards (PCBs) and multi-chip modules (MCMs).<>

Keywords

CMOS integrated circuits; computer interfaces; digital integrated circuits; phase modulation; system buses; 160 Mbit/s; 20 MHz; CMOS I/O interface circuit; chip-to-chip interface; clock cycle; data transfer; multi-chip modules; multiple bits; phase modulation; pin; printed circuit boards; system bus interface; CMOS technology; Circuits; Clocks; Costs; Decoding; Delay effects; Phase detection; Phase modulation; Propagation delay; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-1844-7

Type

conf

DOI

10.1109/ISSCC.1994.344711

Filename

344711