A 320 MHz CMOS triple 8b DAC with on-chip PLL and hardware cursor

Author

Reynolds, D.

Author_Institution

Analog Devices Inc., Wilmington, MA, USA

fYear

1994

fDate

16-18 Feb. 1994

Firstpage

50

Lastpage

51

Abstract

High-speed DACs make desktop computer graphics possible. As screen resolutions increase, faster DACs are required to drive them. Other applications such as direct digital synthesis also require fast DACs. This paper describes a 0.8 /spl mu/m CMOS-only circuit that upconverts 40 MHz input signals to create triple 8b analog outputs running at a clock rate of 320 MHz. The chip includes an 8:1 input mux, triple 8b DACS, and an on-chip PLL to generate clocks. The chip also includes all logic necessary for implementing an X-window-compatible 64/spl times/64/spl times/2 hardware cursor function.<>

Keywords

CMOS integrated circuits; computer graphic equipment; digital-analogue conversion; frequency synthesizers; mixed analogue-digital integrated circuits; phase-locked loops; 0.8 micron; 320 MHz; 8 bit; 8:1 input mux; CMOS; X-window-compatible 64/spl times/64/spl times/2 hardware cursor; clock rate; desktop computer graphics; direct digital synthesis; hardware cursor; on-chip PLL; triple 8b DAC; Circuits; Clocks; Decoding; Delay; Hardware; Logic; Phase locked loops; Registers; Voltage; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-1844-7

Type

conf

DOI

10.1109/ISSCC.1994.344731

Filename

344731