DocumentCode
2286881
Title
Nanowire zero-capacitor DRAM transistors with and without junctions
Author
Lee, Chi-Woo ; Yan, Ran ; Ferain, Isabelle ; Kranti, Abhinav ; Akhvan, N.D. ; Razavi, Pedram ; Yu, Ran ; Colinge, J.P.
Author_Institution
Tyndall Nat. Inst., Univ. Coll. Cork, Cork, Ireland
fYear
2010
fDate
17-20 Aug. 2010
Firstpage
242
Lastpage
245
Abstract
This paper shows the applicability of the JunctionsLess (JL) Multiple-Gate MOSFET (MuGFET) structure to capacitor-less one-transistor dynamic random access memory (1T-DRAM) applications and compares it with the more conventional inversion-mode (IM) MuGFET. The JL-MuGFET has advantages over the IM MuGFETs for 1T-DRAM in that it has a very low leakage current and a low avalanche breakdown voltage due to the lack of junctions in the structure.
Keywords
DRAM chips; MOSFET; avalanche breakdown; leakage currents; nanowires; IT-DRAM; MuGFET; avalanche breakdown voltage; capacitor-less one-transistor dynamic random access memory; junctions-less multiple-gate MOSFET structure; leakage current; nanowire zero-capacitor DRAM transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO), 2010 10th IEEE Conference on
Conference_Location
Seoul
ISSN
1944-9399
Print_ISBN
978-1-4244-7033-4
Electronic_ISBN
1944-9399
Type
conf
DOI
10.1109/NANO.2010.5697888
Filename
5697888
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