Title :
A Discrete FireFly Algorithm for VLSI Circuit Partitioning
Author :
Sharma, Pradip Kumar ; Kaur, Maninder
Author_Institution :
Sch. of Math. & Comput. Applic., Thapar Univ., Patiala, India
Abstract :
The CAD industries are facing a big challenge to meet the time-to-market and quality requirements. The complexity of physical design process has drastically increased due to exponential growth in the transistor count and heterogeneity of circuit elements on single chip. There is a stressing demand on CAD industry for developing faster and efficient techniques for VLSI physical design automation. This paper presents a swarm based heuristic approach for solving balanced min cut circuit partitioning the very first step of VLSI physical design automation.
Keywords :
VLSI; circuit CAD; heuristic programming; integrated circuit design; technology CAD (electronics); time to market; CAD industry; VLSI physical design automation; balanced mincut VLSI circuit partitioning; discrete firefly algorithm; swarm based heuristic approach; time-to-market requirement; transistor count; Automation; Benchmark testing; Design automation; Genetic algorithms; Genetics; Logic gates; Very large scale integration; Balance constraints; Circuit partitioning; Evolutionary firefly algorithm; VLSI circuits;
Conference_Titel :
Electronics and Communication Systems (ICECS), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2321-2
DOI :
10.1109/ECS.2014.6892764
