Title :
A concurrent testing method for NoC switches
Author :
Hosseinabady, Mohammad ; Banaiyan, Abbas ; Bojnordi, Mahdi Nazm ; Navabi, Zainalabedin
Author_Institution :
Electr. & Comput. Eng., Tehran Univ.
Abstract :
This paper proposes reuse of on-chip networks for testing switches in network on chips (NoCs). The proposed algorithm broadcasts test vectors of switches through the on-chip networks and detects faults by comparing output responses of switches with each other. This algorithm alleviates the need for: (1) external comparison of the output response of the circuit-under-test with the response of a fault free circuit stored on a tester (2) on-chip signature analysis (3) a dedicated test-bus to reach test vectors and collect their responses. Experimental results on a few test benches compare the proposed algorithm with traditional system on chip (SoC) test methods
Keywords :
fault diagnosis; integrated circuit testing; network-on-chip; switching networks; NoC switches; SoC test methods; circuit-under-test; concurrent testing method; fault detection; fault free circuit; network on chips; on-chip networks; on-chip signature analysis; switch testing; system on chip test methods; Algorithm design and analysis; Broadcasting; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Network-on-a-chip; Switches; System testing; System-on-a-chip;
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
DOI :
10.1109/DATE.2006.244018