Title :
Gridding techniques for the level set method in semiconductor process and device simulation
Author :
Kan, E.C. ; Ze-Kai Hsiau ; Rao, V. ; Dutton, R.W.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Abstract :
Owing to the static and nonconformal mesh it employs, the level-set method for geometry representation offers several attractive alternatives for boundary movement and finite element schemes in comparison with conformal boundary representation. For boundary movement problems, the adaptive gridding schemes for the level-set method are analyzed for their applicability to tracing thin-film characteristics. For finite element schemes on non-interface-conformal mesh, advantages for additional trial functions based on the level-set function are illustrated by solving a partial differential equation on a geometry with rough interface.
Keywords :
MOS capacitors; mesh generation; partial differential equations; semiconductor device models; semiconductor process modelling; MOS capacitors; boundary movement; finite element schemes; geometry representation; gridding techniques; level set method; level-set function; nonconformal mesh; partial differential equation; rough interface; semiconductor device simulation; semiconductor process simulation; static mesh; Equations; Etching; Finite element methods; Geometry; Level set; Micromechanical devices; Residual stresses; Solid modeling; Sputtering; Transistors;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 1997. SISPAD '97., 1997 International Conference on
Conference_Location :
Cambridge, MA, USA
Print_ISBN :
0-7803-3775-1
DOI :
10.1109/SISPAD.1997.621404
