Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)

Author

Davila, Javier ; De Torres, Alfonso ; Sanchez, Jose Manuel ; Sanchez-Elez, Marcos ; Bagherzadeh, Nader ; Rivera, F.

Author_Institution

Dipt. Arquitectura de Computadores y Automatica, Univ. Complutense de Madrid

Volume

2

fYear

2006

fDate

6-10 March 2006

Abstract

In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computational and has an important restriction in execution time due to the requirement to get interactive results. We demonstrate that the execution of this algorithm in MorphoSys can take advantage of the available parallel resources, as well as of the possibility of one cycle configuration change. In this paper we show that it is possible to implement the rendering algorithm in our coarse grain reconfigurable architecture, obtaining values over 100 fps

Keywords

digital signal processing chips; parallel processing; reconfigurable architectures; rendering (computer graphics); 3D image rendering algorithm; MorphoSys; SIMD reconfigurable architecture; execution time; mapping schemes; Algorithm design and analysis; Computer science; Control systems; Field programmable gate arrays; Graphics; Hardware; Image analysis; Reconfigurable architectures; Rendering (computer graphics); Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2006. DATE '06. Proceedings

Conference_Location

Munich

Print_ISBN

3-9810801-1-4

Type

conf

DOI

10.1109/DATE.2006.243748

Filename

1657114