Title :
Reconfigurable Galois Field multiplier
Author :
Rong-Jian Chen ; Jhen-Wun Fan ; Chin-Hao Liao
Author_Institution :
Dept. of Electron. Eng., Nat. United Univ., Miaoli, Taiwan
Abstract :
Galois Field has received a lot of attention because of their important and particular applications in cryptography, channel coding, etc. This paper presents the Reconfigurable Galois Field multiplier used to calculate the Galois field multiplication of different lengths which consists of AND gates and special cells. The special cell makes multiplier architecture easier to extend and calculate arbitrarily length multiplication. The Reconfigurable Galois Field multiplier only uses combinational logic circuits which have been implemented on Xilinx FPGA. The results prove that this work has better performances than other previous similar works.
Keywords :
Galois fields; combinational circuits; field programmable gate arrays; logic gates; multiplying circuits; AND gates; Galois field multiplication; Xilinx FPGA; arbitrarily length multiplication; combinational logic circuits; multiplier architecture; reconfigurable Galois Field multiplier; special cells; Biometrics (access control); Computer architecture; Cryptography; Delays; Galois fields; Logic gates; Polynomials; Field; Galois; Multiplier; Reconfigurable;
Conference_Titel :
Biometrics and Security Technologies (ISBAST), 2014 International Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4799-6443-7
DOI :
10.1109/ISBAST.2014.7013104