DocumentCode :
2288793
Title :
The Vector Fixed Point Unit of the Synergistic Processor Element of the Cell Architecture Processor
Author :
Mäding, N. ; Leenstra, J. ; Pille, J. ; Sautter, R. ; Büttner, S. ; Ehrenreich, S. ; Haller, W.
Author_Institution :
IBM Entwicklung GmbH, Boeblingen
Volume :
2
fYear :
2006
fDate :
6-10 March 2006
Firstpage :
1
Lastpage :
5
Abstract :
A vector fixed point unit (FXU) is designed to speed up multi-media processing. The FXU implements SIMD style integer arithmetic and permute operations. The adder, rotator and permute structure enables the use of static circuits only. The FXU was fabricated using IBM 90nm CMOS SOI technology
Keywords :
CMOS integrated circuits; coprocessors; data flow computing; fixed point arithmetic; media streaming; silicon-on-insulator; 90 nm; FXU; IBM CMOS SOI technology; SIMD style integer arithmetic; cell architecture processor; multimedia processing; permute operations; static circuits; synergistic processor element; vector fixed point unit; Adders; Arithmetic; Boolean functions; CMOS technology; Clocks; Delay; Frequency; Latches; Logic; Pipelines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
Type :
conf
DOI :
10.1109/DATE.2006.243933
Filename :
1657148
Link To Document :
بازگشت