DocumentCode
2289977
Title
A label search chip with cache-based CAM architecture
Author
Jiang, Ymgtao ; Wang, Yuke ; Skavantzos, Alexander
Author_Institution
Dept. of Comput. Sci., Texas Univ., Richardson, TX, USA
Volume
2
fYear
2001
fDate
2001
Firstpage
564
Abstract
This paper describes a label search engine for Multiprotocol Label Switching over ATM networks, built upon multiple hierarchically configured CAM cores with embedded dynamic cache sorting logic. The chip has been designed using a 0.18 μm CMOS technology running at 200 MHz with total power consumption less than 2 W
Keywords
CMOS integrated circuits; asynchronous transfer mode; cache storage; content-addressable storage; memory architecture; memory protocols; microprocessor chips; search engines; switching circuits; 0.18 μm CMOS; 0.18 micron; 2 W; 200 MHz; ATM networks; embedded dynamic cache sorting logic; hierarchically configured CAM cores; label search engine; multiprotocol label switching; power consumption below 2W; Asynchronous transfer mode; CADCAM; CMOS technology; Computer aided manufacturing; Energy consumption; Multiprotocol label switching; Packet switching; Search engines; Sorting; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location
Dayton, OH
Print_ISBN
0-7803-7150-X
Type
conf
DOI
10.1109/MWSCAS.2001.986254
Filename
986254
Link To Document