A hierarchical BSP model supporting processor locality

The paper presents a parallel computing model, called H-BSP, which adds a hierarchical concept to the BSP (Bulk Synchronous Parallel) computing model. A H-BSP program consists of a number of BSP groups which are dynamically created at run time and executed in a hierarchical fashion. H-BSP allows the algorithm designer to develop a more efficient algorithm by utilizing processor locality in the program. The paper describes the structure of the H-BSP model, complexity analysis and an example of the H-BSP algorithm. Also presented are the performance characteristics of the H-BSP algorithm based on simulation analysis. Simulation results show that H-BSP model takes advantages of processor locality and performs well in low bandwidth networks or in a constant valence architecture such as a 2 dimensional mesh. It is also proved that H-BSP model can predict algorithm performance better than the BSP model due to its locality preserving nature