DocumentCode
2290922
Title
A-RAM: Novel capacitor-less DRAM memory
Author
Rodriguez, Noel ; Cristoloveanu, Sorin ; Gamiz, Francisco
Author_Institution
Dept. of Electron., Univ. of Granada, Granada, Spain
fYear
2009
fDate
5-8 Oct. 2009
Firstpage
1
Lastpage
2
Abstract
A totally different capacitor-less, single-transistor memory cell (1T-DRAM) is proposed and documented. Its novelty comes from the body partitioning in two distinct regions, where electrons and holes are respectively confined. As compared to earlier 1T-DRAMs, the coexistence and coupling of electrons and holes is maintained even in ultrathin fully depleted MOSFETs. Selected simulations demonstrate attractive performance and great potential for embedded memory applications.
Keywords
DRAM chips; embedded systems; integrated circuit design; silicon-on-insulator; A-RAM design; Si-SiO2; capacitor-less DRAM memory; embedded memory; single-transistor memory cell; ultrathin SOI technology; ultrathin fully depleted MOSFET; Body regions; Capacitors; Charge carrier processes; Electrons; Impact ionization; MOSFETs; Memory architecture; Random access memory; Scalability; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2009 IEEE International
Conference_Location
Foster City, CA
ISSN
1078-621X
Print_ISBN
978-1-4244-4256-0
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2009.5318734
Filename
5318734
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