DocumentCode
2290934
Title
Exploiting bondwire parasitic impedance in the design of a 1.6 GHz narrow-band CMOS low noise amplifier
Author
Al-Rawi, Ghazi A.
Author_Institution
STAR Lab., Stanford Univ., CA, USA
Volume
2
fYear
2001
fDate
2001
Firstpage
804
Abstract
This paper presents a new technique for efficiently utilizing the parasitic impedance of bondwires in the design of a 1.6 GHz high performance narrow-band Low Noise Amplifier (LNA). Bondwires have reasonably predictable parasitic impedance and have much higher quality factors compared to on-chip spiral inductors. The proposed LNA design uses bondwires to provide the needed inductive reactance and does not use any on-chip spiral inductors. Series capacitors are used to control the inductive reactance of bondwires. HSPICE simulations show that the LNA achieves a noise figure NF of only 2.0 dB in 0.6 μm CMOS process technology. It has S11 of -10.04 dB, S22 of -29.3 dB, S21 of 21.2 dB, input referred IP3 of -8 dBm, and consumes 14.94 mW from a 2.5 V power supply
Keywords
CMOS analogue integrated circuits; Q-factor; UHF amplifiers; UHF integrated circuits; electric impedance; integrated circuit bonding; integrated circuit design; integrated circuit noise; lead bonding; 0.6 micron; 1.6 GHz; 14.94 mW; 2 dB; 2.5 V; CMOS low noise amplifier; RFIC; bondwire parasitic impedance; inductive reactance; narrow-band LNA; quality factors; series capacitors; Bonding; Capacitors; Impedance; Inductors; Low-noise amplifiers; Narrowband; Noise figure; Noise measurement; Q factor; Spirals;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location
Dayton, OH
Print_ISBN
0-7803-7150-X
Type
conf
DOI
10.1109/MWSCAS.2001.986309
Filename
986309
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