• DocumentCode
    2290980
  • Title

    High temperature performance of OTA with non-ideal Double Gate SOI MOSFETs

  • Author

    Kranti, Abhinav ; Armstrong, G. Alastair

  • Author_Institution
    Semicond. & Nanotechnol. Group, Queen´´s Univ. Belfast, Belfast, UK
  • fYear
    2009
  • fDate
    5-8 Oct. 2009
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    The enormous potential of underlap S/D architecture in DG FETs for enhancing true circuit metrics, has been presented in this paper. An s/sigma ratio of 3.2 is optimal for achieving improved analog parameters accommodating high degree of misalignment and oversize between dual gates and preserving functionality at high temperatures.
  • Keywords
    MOSFET; operational amplifiers; silicon-on-insulator; thermal analysis; DG FET; S/D architecture; Si-SiO2; analog parameters; circuit metrics; dual gates; high temperature functionality; high temperature performance OTA; nonideal double gate SOI MOSFET; Computer science; Degradation; Doping profiles; FETs; MOSFETs; Nanotechnology; Operational amplifiers; Scalability; Temperature; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2009 IEEE International
  • Conference_Location
    Foster City, CA
  • ISSN
    1078-621X
  • Print_ISBN
    978-1-4244-4256-0
  • Electronic_ISBN
    1078-621X
  • Type

    conf

  • DOI
    10.1109/SOI.2009.5318736
  • Filename
    5318736
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2290980