DocumentCode :
2291181
Title :
Design automation algorithms for regenerative pass-transistor logic
Author :
Cheung, Tsz-Shing ; Asada, Kunihiro ; Wong, Hei
Author_Institution :
Dept. of Electron. Eng., Tokyo Univ., Japan
Volume :
3
fYear :
1997
fDate :
9-12 Jun 1997
Firstpage :
1540
Abstract :
nMOS pass-transistor logic is one of the most popular logic families for its exclusive usage of nMOS-FETs and simple form of 2-input multiplexer and exclusive-OR gate. The nMOS-only structure is also found speedy and simple for basic logic gates. In addition, Regenerative Pass-transistor Logic (RPL) is a dual-rail pass-transistor logic with various advantages including compact layout area and high operating speed. However, in combinational logic, there are many control logics with complex structures which are difficult to be implemented in conventional pass-transistor logics. In this paper, the general design procedure and the design automation algorithms for RPL circuits under speed-power performance consideration are studied
Keywords :
MOS logic circuits; combinational circuits; logic CAD; logic design; combinational logic; design automation algorithm; exclusive-OR gate; multiplexer; nMOS circuit; nMOSFET; regenerative pass-transistor logic; Algorithm design and analysis; CMOS logic circuits; Delay; Design automation; Logic design; Logic gates; MOS devices; MOSFETs; Semiconductor device modeling; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
Type :
conf
DOI :
10.1109/ISCAS.1997.621422
Filename :
621422
Link To Document :
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