Title :
Comparison of ultra-low-power and static CMOS full adders in 0.15 µm FD SOI CMOS
Author :
Kamel, D. ; Bol, D. ; Standaert, F.-X. ; Flandre, D.
Author_Institution :
Microelectron. Lab. (DICE), Univ. catholique de Louvain, Louvain-la-Neuve, Belgium
Abstract :
Ultra-low-power and static CMOS full adders are implemented in a 0.15 mum FD SOI CMOS technology with 1.5 V supply. The power consumption of ultra-low-power full adder is shown to be half that of static CMOS. These results are confirmed by both measurements and SPICE simulations in different corners of operation.
Keywords :
CMOS logic circuits; SPICE; adders; low-power electronics; silicon-on-insulator; FD SOI CMOS; SPICE simulations; power consumption; size 0.15 mum; static CMOS full adders; ultralow-power full adder; voltage 1.5 V; Adders; Birth disorders; CMOS technology; Capacitance; Energy consumption; Frequency; MOSFET circuits; Power measurement; Routing; Testing;
Conference_Titel :
SOI Conference, 2009 IEEE International
Conference_Location :
Foster City, CA
Print_ISBN :
978-1-4244-4256-0
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2009.5318751
