Title :
Performance comparison of MCML and PFSCL gates in 0.18 μm CMOS technology
Author :
Gupta, Kirti ; Sridhar, Ranjana ; Chaudhary, Jaya ; Pandey, Neeta ; Gupta, Maneesha
Author_Institution :
Electron. & Commun. Dept., Delhi Technol. Univ., New Delhi, India
Abstract :
In this paper, the performance of two popular source coupled logic styles, namely, MOS Current Mode Logic (MCML) and Positive Feedback Source Coupled Logic (PFSCL) is investigated. A number of SPICE simulation runs have been carried out using 0.18 μm CMOS technology parameters. The PFSCL circuit show better results than the MCML circuit in terms of propagation delay and area. The effect of process variations through Monte Carlo simulations however shows lower variations in MCML circuits style.
Keywords :
CMOS integrated circuits; CMOS logic circuits; Monte Carlo methods; SPICE; current-mode logic; CMOS technology; MCML; MOS current mode logic; Monte Carlo simulations; PFSCL gates; SPICE simulation; positive feedback source coupled logic; CMOS integrated circuits; Integrated circuit modeling; Inverters; Logic gates; Noise; Semiconductor device modeling; Transconductance; MCML; PFSCL; SCL;
Conference_Titel :
Computer and Communication Technology (ICCCT), 2011 2nd International Conference on
Conference_Location :
Allahabad
Print_ISBN :
978-1-4577-1385-9
DOI :
10.1109/ICCCT.2011.6075165
