DocumentCode
229149
Title
Memory sharing techniques for multi-standard high-throughput FEC decoder
Author
Zhenzhi Wu ; Liu, Deming
Author_Institution
Sch. of Inf. & Electron., Beijing Inst. of Technol., Beijing, China
fYear
2014
fDate
14-17 July 2014
Firstpage
93
Lastpage
98
Abstract
Nowadays multi-standard wireless baseband, Convolutional Code (CC), Turbo code and LDPC code are widely applied and need to be integrated within one FEC module. Since memory occupies half or even more area of the decoder, memory sharing techniques for area saving purpose is valuable to consider. In this work, several memory merging techniques are proposed. A non-conflict access technique for merged path metric buffer is proposed. The results show that 41% of total memory bits are saved when integrating three different decoding schemes including CC (802.11a/g/n), LDPC (802.11n and 802.16e) and Turbo (3GPP-LTE). Synthesis result with 65nm process shows that the merged memory blocks consume merely 1.06mm2 of the chip area.
Keywords
convolutional codes; forward error correction; parity check codes; storage management; CC; LDPC code; Turbo code; convolutional code; forward error correction code; memory merging techniques; memory sharing techniques; merged path metric buffer; multistandard high-throughput FEC decoder; nonconflict access technique; Computational modeling; Decoding; Measurement; Memory management; Parity check codes; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), 2014 International Conference on
Conference_Location
Agios Konstantinos
Type
conf
DOI
10.1109/SAMOS.2014.6893199
Filename
6893199
Link To Document