Title :
Performance of multiple links over single link in STC104 networks
Author :
Lee, Hyo Jong ; Song, Byeong Yeol
Author_Institution :
Dept. of Electron Eng., Chonbuk Nat. Univ., Chonju, South Korea
Abstract :
There is a great demand for an efficient and reliable router in high performance parallel processing systems or data management networks. The fast routing chip, Inmos STC104 has been designed and now available in the market. The performance and characteristics of each different network topology, multistage networks, meshes, tori, and N-cubes are vital information to make decision on an appropriate network. This paper reviews the technology utilized in a fast packet switch STC104 and studies reliable routing algorithms for various network configurations. The performances of several configurations under a single link and multiple links environment are also simulated and compared
Keywords :
multiprocessor interconnection networks; packet switching; parallel processing; performance evaluation; Inmos STC104; N-cubes; STC104 networks; data management networks; fast packet switch STC104; fast routing chip; high performance parallel processing systems; meshes; multiple links performance; multistage networks; network configurations; reliable router; single link; tori; Communication system control; Computer network reliability; Computer networks; Data engineering; Intelligent networks; Network topology; Packet switching; Routing; Switches; Very large scale integration;
Conference_Titel :
Parallel and Distributed Systems, 1997. Proceedings., 1997 International Conference on
Conference_Location :
Seoul
Print_ISBN :
0-8186-8227-2
DOI :
10.1109/ICPADS.1997.652550
