High-efficiency solar cell embedded in SOI substrate for ULP autonomous circuits

A low-cost and high-efficiency monocristalline silicon solar cell embedded in a CMOS circuit is proposed for ULP autonomous circuits. Based on a SOI wafer, a photovoltaic lateral diode is realized in the substrate using the fabrication steps of the FD SOI CMOS process of the superposed active circuitry. In case of front side illumination, we achieve 15% efficiency when no CMOS circuit is present, and 11% with an integrated structure in the silicon thin-film overlayer. An efficiency of 19.5% can be further reached in this last case when a 20 V bias difference is applied between the thin-film layer and the back contact to deplete the buried oxide / Si substrate interface.