Design of integrated DSP solution for cardiologic problems using revolutionary VLSI methodologies

The authors describe the application of the Cathedral silicon compiler (J. Rabaey et al. 1988) to the design of digital signal processors (DSPs) for cardiological data. Cathedral 1 permits the automated synthesis, analysis, optimization, and simulation of wave digital filters, while Cathedral 2 automates the design of multiprocessor DSP systems. Starting from an algorithmic description, interactive optimization leads to the generation of an optimal integrated circuit layout. The authors used the design tools to implement automatic defibrillation, antitachy, and cardioversion building blocks, i.e. linear and nonlinear ECG filtering, QRS detection using adaptive thresholds, and recognition of ventricular arrhythmia using the probability-density function of the ECG and autocorrelation of both ECG and intramyocardial pressure. Preliminary simulation results show good parameter discrimination performance